This invention relates generally to charge pumps. More particularly, the present invention relates to integrated circuit charge pumps having low voltage loss per stage and having a voltage regulated output.
A prior art charge pump 10 is shown in FIG. 1 for "pumping" a low voltage input into a higher voltage output, which can be, and usually is, higher than any external voltage supply available to an integrated circuit containing the charge pump. Charge pump 10 includes a chain of serially-connected diodes 12 in which the cathode of a diode 12 in the chain is coupled to the anode of a next diode 12 in the chain. The anode of a first diode 12 in the chain forms the voltage input, Vin, at node 26, and the cathode of a last diode 12 in the chain forms the voltage output, Vout, at node 29. Output node 29 is terminated with a capacitor 17, which is in turn coupled to ground. The cathodes of odd-numbered diodes 12 are coupled via parallel-connected capacitors 14 to bus 18. Bus 18 provides a first phase clock signal designated PH1. The cathodes of even-numbered diodes 12 are coupled via parallel-connected capacitors 16 to bus 20. Bus 20 provides a second phase clock signal designated PH2, wherein the first and second phase clocks signals are 180 degrees out of phase, or "antiphase". The first and second phase clock signals can be provided directly, or through a single oscillator input designated "oscin" at node 28. The two phase clock signals are then provided by the outputs of serially-connected inverters 22 and 24. The combination of a diode 12 with either a capacitor 14 or 16 forms a single charge pump stage.
The two clocks signals PH1 and PH2 have equal peak voltage amplitudes and are capacitively coupled to alternate cathode nodes along the diode chain. Charge pump 10 operates in a manner similar to a bucket-brigade delay line, by pumping packets of charge along the diode chain as the coupling capacitors 14 and 16 are successively charged and discharged during each half of the clock cycle. Unlike the bucket-brigade delay line, however, the voltages in the diode chain are not reset after each pumping cycle so that the average node potentials increase progressively from the input to the output of the diode chain. The output voltage at node 29 will exhibit some ripple determined by the value of output capacitor 17, the voltage magnitude of the clock signals PH1 and PH2, as well as other factors.
While charge pump 10 can be fabricated on an integrated circuit if desired, the output voltage at node 29 is unregulated and is therefore limited to an integer multiple of the input voltage in the typical circuit configuration. The output voltage at node 29 also varies as a function of the input voltage range. Further, since diodes 12 are used in the charge pump stages, the efficiency of the charge pump for low input voltages is compromised since a portion of the voltage increase attained with each charge pump stage is dissipated by the forward voltage drop ("V.sub.BE ") of each diode 12. If a large increase in voltage is required, a corresponding large number of charge pump stages are required because of the inherent loss of voltage due to the V.sub.BE loss in each stage. Finally, while charge pump 10 can be technically fabricated on an integrated circuit, the die size is likely to be uneconomically large because of the corresponding large size of typically used integrated silicon dioxide capacitors.
What is desired is an improved integrated circuit charge pump having a regulated output that is efficient and has a minimum number of charge pump stages to attain the desired output voltage.